TSMC Introduces N4C Node to Drive Cost Efficiency in Semiconductor Production

4 months ago 1239

TSMC has unveiled a new N4C process that builds upon its existing '4nm' nodes while offering a more cost-effective solution. The chipmaker claims a cost reduction of over 8 percent compared to N4P.

The announcement of the N4C node was made by TSMC during its annual Technology Symposium. This new production process is part of TSMC's N5 and N4 families, which are utilized in various tech products such as AMD's Ryzen 7000 processors, Nvidia RTX 40 series, Apple's M2 SoCs, and the A16 Bionic chip found in the iPhone 14 and 14 Pro models.

Based on the second generation 4nm node N4P, the N4C process features redesigned standard cells and SRAM to streamline production. By reducing the number of masking layers required, production costs are lowered by up to 8.5 percent. TSMC also touts higher yields with the N4C process compared to N4P. Mass production of N4C is expected to commence next year, although specifics on timing are not provided. It remains uncertain if existing N5 and N4 designs can be easily transitioned to N4C, but TSMC assures that the N4P design infrastructure is reusable.